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MC100LVEP111 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver
Description
The MC100LVEP111 is a low skew 1-to-10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions. The LVEP111 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure tightest skew, both sides of differential outputs identically terminate into 50 W even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The MC100LVEP111, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the LVEP111 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. Single-ended CLK input operation is limited to a VCC 3.0 V in PECL mode, or VEE v -3.0 V in NECL mode. Designers can take advantage of the LVEP111's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For more information on using PECL, designers should refer to Application Note AN1406/D.
Features
http://onsemi.com MARKING DIAGRAM*
MC100 LVEP111 AWLYYWWG LQFP-32 FA SUFFIX CASE 873A 32 1
1
1
32
QFN32 MN SUFFIX CASE 488AM A WL, L YY, Y WW, W G
MC100 LVEP111 ALYWG
* * * * * * * *
85 ps Typical Device-to-Device Skew 20 ps Typical Output-to-Output Skew Jitter Less than 1 ps RMS Maximum Frequency > 3 Ghz Typical VBB Output 430 ps Typical Propagation Delay The 100 Series Contains Temperature Compensation PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V with VEE = -2.375 V to -3.8 V Open Input Default State
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
* NECL Mode Operating Range: VCC = 0 V * * LVDS Input Compatible * Fully Compatible with MC100EP111 * Pb-Free Packages are Available
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 13
1
Publication Order Number: MC100LVEP111/D
MC100LVEP111
Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6
Table 1. PIN DESCRIPTION
PIN FUNCTION ECL/PECL/HSTL CLK Input ECL/PECL/HSTL CLK Input ECL/PECL Outputs ECL/PECL Active Clock Select Input Reference Voltage Output Positive Supply Negative Supply The exposed pad (EP) on the package bottom must be attached to a heat-sinking conduit. The exposed pad may only be electrically connected to VEE. * Pins will default LOW when left open. ** Pins will default to VCC/2 when left open.
24 VCC Q2 Q2 Q1 Q1 Q0 Q0 VCC 25 26 27 28 29 30 31 32 1
23
22
21
20
19
18
17 16 15 14 VCC Q7 Q7 Q8 Q8 Q9 Q9 VCC
CLK0*, CLK0** CLK1*, CLK1** Q0:9, Q0:9 CLK_SEL* VBB VCC VEE EP
MC100LVEP111
13 12 11 10 9
2
3
4
5
6
7
8
CLK_SEL
CLK0
CLK0
CLK1
CLK1
VCC
VBB
VEE
Table 2. FUNCTION TABLE
CLK_SEL L H Active Input CLK0, CLK0 CLK1, CLK1
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. LQFP-32 Pinout (Top View)
VCC 32 VCC CLK_SEL CLK0 CLK0 VBB CLK1 CLK1 VEE 1 2 3 4 5 6 7 8 9
Q0 31
Q0 30
Q1 29
Q1 28
Q2 27
Q2 VCC 26 25 24 Q3 23 Q3 22 Q4
MC100LVEP111
21 Q4 20 Q5 19 Q5 18 Q6 17 Q6
10
11 Q9
12 Q8
13 Q8
14 Q7
15 Q7
16 VCC Exposed Pad (EP)
VCC Q9
Figure 2. QFN-32 Pinout (Top View)
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MC100LVEP111
Table 3. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkgs LQFP QFN Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, refer to Application Note AND8003/D. Oxygen Index: 28 to 34 Level 2 Level 1 Value 75 kW 37.5 kW > 2 kV > 100 V > 2 kV Pb-Free Pkgs Level 2 Level 1
Moisture Sensitivity (Note 1)
UL 94 V-0 @ 0.125 in 602 Devices
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 CLK0 0 CLK0 CLK1 1 CLK1 VBB CLK_SEL VEE Q4 Q4 Q5 Q5 Q6 Q6 Q7 Q7 VCC Q8 Q8 Q9 Q9
Figure 3. Logic Diagram
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MC100LVEP111
Table 4. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free (QFN-32 Only) 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm 2S2P < 3 sec @ 248C < 3 sec @ 260C LQFP-32 LQFP-32 LQFP-32 QFN-32 QFN-32 QFN-32 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 31 27 12 265 265 Units V V V V mA mA mA C C C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC100LVEP111
Table 5. PECL DC CHARACTERISTICS VCC = 2.5 V; VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) (Note 4) Input LOW Voltage (Single-Ended) (Note 4) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 5) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 60 1355 555 1335 555 1.2 Typ 90 1480 730 Max 120 1605 900 1620 875 2.5 Min 60 1355 555 1335 555 1.2 25C Typ 90 1480 730 Max 120 1605 900 1620 875 2.5 Min 60 1355 555 1275 555 1.2 85C Typ 90 1480 730 Max 120 1605 900 1620 875 2.5 Unit mA mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.125 V to -1.3 V. 3. All loading with 50 W to VEE. 4. Do not use VBB at VCC < 3.0 V. 5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 6. PECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0 V (Note 6)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 7) Output LOW Voltage (Note 7) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Reference Voltage (Note 8) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 9) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 60 2155 1355 2135 1355 1775 1.2 1875 Typ 90 2280 1530 Max 120 2405 1700 2420 1675 1975 3.3 Min 60 2155 1355 2135 1355 1775 1.2 1875 25C Typ 90 2280 1530 Max 120 2405 1700 2420 1675 1975 3.3 Min 60 2155 1355 2135 1355 1775 1.2 1875 85C Typ 90 2280 1530 Max 120 2405 1700 2420 1675 1975 3.3 Unit mA mV mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.925 V to -0.5 V. 7. All loading with 50 W to VCC - 2.0 V. 8. Single ended input operation is limited VCC 3.0 V in PECL mode. 9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100LVEP111
Table 7. NECL DC CHARACTERISTICS VCC = 0 V, VEE = -2.375 V to -3.8 V (Note 10)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 11) Output LOW Voltage (Note 11) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Reference Voltage (Note 12) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 13) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 60 -1145 -1945 -1165 -1945 -1525 -1425 Typ 90 -1020 -1770 Max 120 -895 -1600 -880 -1625 -1325 0.0 Min 60 -1145 -1945 -1165 -1945 -1525 -1425 25C Typ 90 -1020 -1770 Max 120 -895 -1600 -880 -1625 -1325 0.0 Min 60 -1145 -1945 -1165 -1945 -1525 -1425 85C Typ 90 -1020 -1770 Max 120 -895 -1600 -880 -1625 -1325 0.0 Unit mA mV mV mV mV mV V
VEE + 1.2
VEE + 1.2
VEE + 1.2
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. 11. All loading with 50 W to VCC - 2.0 V. 12. Single ended input operation is limited VEE -3.0V in NECL mode. 13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 8. HSTL DC CHARACTERISTICS VCC = 2.375 to 3.8 V, VEE = 0 V
-40C Symbol VIH VIL Vx ICC Characteristic Input HIGH Voltage Input LOW Voltage Input Crossover Voltage Power Supply Current 680 70 100 Min 1200 400 900 120 680 70 100 Typ Max Min 1200 400 900 120 680 70 100 25C Typ Max Min 1200 400 900 120 85C Typ Max Unit mV mV mV mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
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MC100LVEP111
Table 9. AC CHARACTERISTICS VCC = 0 V; VEE = -2.375 to -3.8 V or VCC = 2.375 to 3.8 V; VEE = 0 V (Note 14)
-40C Symbol fmaxPECL/HSTL tPLH tPHL tskew Characteristic Maximum Frequency (Figure 4) Propagation Delay (Differential Configuration) Within-Device Skew (Note 15) Within-Device Skew @ 2.5 V (Note 15) Device-to-Device Skew (Note 16) CLOCK Random Jitter (RMS) @ v0.5 GHz @ v1.0 GHz @ v1.5 GHz @ v2.0 GHz @ v2.5 GHz @ v3.0 GHz Minimum Input Swing Output Rise/Fall Time (20%-80%) 150 105 325 Min Typ 3 400 20 20 85 475 25 25 150 350 Max Min 25C Typ 3 430 20 20 85 500 25 25 150 440 Max Min 85C Typ 3 510 25 20 85 590 35 25 150 Max Unit GHz ps ps
tJITTER
0.209 0.200 0.197 0.220 0.232 0.348 800 200
0.5 0.5 0.4 0.5 0.4 0.6 1200 255 150 125
0.204 0.214 0.213 0.224 0.290 0.545 800 200
0.5 0.6 0.5 0.5 0.5 0.8 1200 275 150 150
0.221 0.229 0.243 0.292 0.522 0.911 800 230
0.5 0.5 0.4 0.6 0.8 1.3 1200 320
ps
VPP tr/tf
mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Measured with 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 15. Skew is measured between outputs under identical transitions and conditions on any one device. 16. Device-to-Device skew for identical transitions at identical VCC levels. 800 700 VOUTpp (mV) 600 500 400 300 200 100 0
0
1000
2000
3000
4000
5000
6000
FREQUENCY (MHz)
Figure 4. Fmax Typical
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MC100LVEP111
Q Driver Device Q Zo = 50 W 50 W 50 W D Zo = 50 W D Receiver Device
VTT VTT = VCC - 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC100LVEP111FA MC100LVEP111FAG MC100LVEP111FAR2 MC100LVEP111FARG MC100LVEP111MNG MC100LVEP111MNRG Package LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) QFN-32 (Pb-Free) QFN-32 (Pb-Free) Shipping 250 Units / Tray 250 Units / Tray 2000 / Tape & Reel 2000 / Tape & Reel 74 Units / Rail 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100LVEP111
PACKAGE DIMENSIONS
32 LEAD LQFP CASE 873A-02 ISSUE C
-T-, -U-, -Z- AE P V V1 DETAIL Y
BASE METAL
32
A1
A
25
4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U-
17
N 9 -Z- S
8X M_ 4X
S1
R
J
G -AB-
SEATING PLANE
DETAIL AD CE
SECTION AE-AE
-AC- 0.10 (0.004) AC 0.250 (0.010) H W X DETAIL AD K Q_
GAUGE PLANE
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION.
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.450 0.750 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF
INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.018 0.030 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
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0.20 (0.008)
0.20 (0.008) AC T-U Z
F
EE EE EE
9
D
M
AC T-U Z
DETAIL Y
AE
MC100LVEP111
PACKAGE DIMENSIONS
QFN32 5*5*1 0.5 P CASE 488AM-01 ISSUE O
A B
NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN NOM MAX 0.800 0.900 1.000 0.000 0.025 0.050 0.200 REF 0.180 0.250 0.300 5.00 BSC 2.950 3.100 3.250 5.00 BSC 2.950 3.100 3.250 0.500 BSC 0.200 --- --- 0.300 0.400 0.500
D
PIN ONE LOCATION
2X 2X
0.15 C 0.15 C 0.10 C
32 X
0.08 C L
32 X
32 X b 0.10 C A B
0.05 C BOTTOM VIEW 0.28
32 X
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
EE EE
TOP VIEW SIDE VIEW
9 8
E
(A3) A A1 C
EXPOSED PAD 16 SEATING PLANE
DIM A A1 A3 b D D2 E E2 e K L
SOLDERING FOOTPRINT*
5.30 3.20 0.63
32 X
D2
K
17 32 X
E2
1 32 25 24
e
3.20 5.30
0.50 PITCH
DIMENSIONS: MILLIMETERS
28 X
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC100LVEP111/D

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